Order of RISC-V Conventions

Question

Suppose we have the following stack, where the red line is the indicator for sp:

  

Suppose we now want the stack to contain these additional data items in the following order:

We are given the following instructions:

(a) addi sp, sp, -8 

(b) addi sp, sp, 4

(c) add sp, sp, 8 

(d) sw t2, 0(sp) 

(e) sw t2, 4(sp) 

(f) sw t0, 0(sp) 

(g) sw t0, 4(sp)

(h) lw t0, 4(sp)

(i) lw t2, 0(sp)

Which of the following sequence of RISC-V instructions will generate the stack status we want? Assuming that all the contents in the registers are words (4 bytes) and that the growth of the stack is downwards in memory(as was discussed in lectures).

  

  None of the options

 

  (b) -> (a) -> (e) -> (f)

 

  (b) -> (a) -> (g) -> (d)

 

  (b) -> (b) -> (h) -> (i)

 

  (c) -> (d) -> (g) -> (h)

 

Answer 1

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