Logic Circuit Design by using ROM

Question

With a counter 10 lights will be controlled. At the first clock pulse all lights will be ON (1). At the following pulses, lights will be off from inside to outside and the ones that are OFF will not be ON. IF WE WANT TO DESIGN THIS PROBLEM BY USING ROM, HOW MANY INPUTS WILL THE ROM HAVE?

Answer 1

Assuming that you are referring to a counter circuit implemented as an FSM whose combinational logic part is implemented with a ROM device, then the FSM will have 6 states for the light outputs given by the following 1s and 0s

0 0 0 0 0 0 0 0 0 0 all lights off

1 1 1 1 1 1 1 1 1 1 all lights on

1 1 1 1 0 0 1 1 1 1 2 inner lights off

1 1 1 0 0 0 0 1 1 1 4 inner lights off

1 1 0 0 0 0 0 0 1 1 6 inner lights off

1 0 0 0 0 0 0 0 0 1 8 inner lights off

0 0 0 0 0 0 0 0 0 0 all lights off again (same is 1st state)

There is no external input for this counter, however there will be ceil(log₂(6)) state variables. This equals to 3 state variables which are needed. This there will be 3 inputs needed for the ROM device to represent the current stat of the FSM.